Analytical Approach to Improve the Performance of a Fully Integrated Class-F Power Amplifier with 0.13 µm BiCMOS Technology Using Drain–Bulk Capacitor Modulation

نویسندگان

چکیده

This article reports a novel technique based on drain–bulk capacitor modulation to improve the performance design of class-F power amplifier (PA) used in low-power transceivers I-Q amplitude considering linearity–efficiency–miniaturization trade-offs. idea is carried out by implementing tuned parallel with cascode transistor output stage enhance shape voltage–current amplitudes PA creating new harmonic current component. Simulated results were obtained for back-off region proposed configuration, an power, gain and power-added efficiency 8 dBm (+ 5 dBm)B, 19 dB dB)B 45% 5% 10%)B, respectively. In addition, post-layout simulations revealed similar level 20 28% added capacitance equal 1.3 pF. Class-F implemented 732×605 μm2 chip’s surface. (B: indicates improved values region).

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ژورنال

عنوان ژورنال: Electronics

سال: 2023

ISSN: ['2079-9292']

DOI: https://doi.org/10.3390/electronics12132784